Design-Reuse: DI2CMS, I2C Master - Slave Bus Interface from Digital Core Design
This application note presents the software support of I2C master and slave mode for Z8 Encore!®. It presents a brief description, development of software emulation, as well as the testing of the I2C ...
TechRepublic: Design and Implementation of I2c Master Controller on FPGA using VHDL
In this paper, the authors proposed on I2c protocol following master controller. This controller is connected to a microprocessor or computer and reads 8 bit instructions following I2C protocol. The ...
Electronic Design: Analog Switch Connects One I2C Bus Master To Multiple SFP Modules
The I2C-MS core is a controller for the Inter-Integrated Circuit (I2C) bus. The highly configurable core can implement an I2C bus master, slave, or a ...
Design-Reuse: Digital Blocks Announces I2C-Master Controller IP Core Family with the availability of the DB-I2C-M for the ARM AMBA 2.0 APB and Altera NIOS II Avalon Interconnects
Digital Blocks Announces I2C-Master Controller IP Core Family with the availability of the DB-I2C-M for the ARM AMBA 2.0 APB and Altera NIOS II Avalon Interconnects
The eSi-I2C core implements the I2C two-wire protocol. It supports operation as both an I2C master and slave. The I2C is supplied with an AMBA APB sla ...
Bytom -- -- Digital Core Design, an IP Core and System on Chip design house from Poland, has introduced its newest I2C Bus Interface soft core. It is fully compatible with Philips v. 3.0 ...
San Jose, Calif. – Targeting industrial applications and high-end systems that can benefit from an I2C serial bus but are not equipped for one, Philips Semiconductors has launched a parallel-to-serial ...